Bursting the cheap-chip bubble barrier

Published: 18 January 2007  12:00 PM
Source: The Engineer Online

Led by Professor of Engineering Stephen Chou, the team worked to troubleshoot one form of nanoimprint lithography, a method invented by Chou in the 1990s. Nanoimprint uses a nanometre-scale mould to pattern computer chips and other nanostructures, in contrast to conventional methods that use beams of light, electrons or ions to carve designs onto devices.

This technique allows for the creation of circuits and devices with features not much longer than a nanometre, which the researchers said is more than 10 times smaller than possible in today's mass-produced chips, yet more than 10 times cheaper. Nanoimprinting could be used in the future manufacturing of computer chips and a broad range of nanodevices for use in optics, magnetic data storage and biotechnology, among other disciplines.

In dispensing-based nanoimprinting, liquid droplets on the surface of a silicon wafer are pressed into a pattern, which quickly hardens to form the desired circuitry. This technique is more attractive to manufacturers than some other forms of nanoimprinting because it does not need to be done in an expensive vacuum chamber. However, the widespread use of the technique has been hindered by the formation of gas bubbles that distort the intended pattern.

‘This is an important step because to benefit from the technology of nanoimprinting you need to be able to use it in mass manufacturing at low cost,’ Chou said.

In a series of experimental and theoretical studies, Chou and his colleagues studied the factors that cause air bubbles to form and explored ways to eliminate the sub-millimetre-sized scourges. By increasing the imprinting pressure or using liquids that have higher air solubility, they were able to dramatically increase the likelihood that the bubbles would dissolve in the liquid before it hardened.

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