Integrated dispersion compensation and timing
Bristol, England-based Phyworks, a fabless semiconductor company, has begun to ship samples of its 10 Gbit/sec PHY1060 Electronic Dispersion Compensation (EDC) integrated circuit (IC).
Claimed to be the market's first 10Gbit/sec device to integrate EDC with a high sensitivity Postamplifier and a Clock Recovery Unit (CRU), Phyworks' EDC enables extended serial 10Gbit/sec transmission over Multi-Mode Fiber (MMF) infrastructure.
Designed in standard 0.13µm CMOS technology and packaged in a 5x5mm PBGA, the chip combines proprietary circuitry and automatic time-adaptive algorithms to correct Intersymbol Interference (ISI) sources in MMF and Single-Mode Fibre (SMF), including Chromatic, Polarization and Differential Mode Dispersion.
'Competitors have made significant compromises in their designs such as not incorporating a CRU. This leads to an EDC IC that will open an eye vertically, but will most likely result in horizontal eye closure, or 'jitter'. This results from the inherent properties of multi-mode fibre and is addressed by Phyworks' integrated approach to EDC and re-timing. EDC without integrated re-timing burdens components further downstream in the system,' said Stephen King, Phyworks' CEO.
The PHY1060 IC is being sampled by select partners, and will be priced below $50 in volume quantities.