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A Lancaster University physicist has been given a Royal Society Brian Mercer Feasibility Award to support his work developing a new type of computer memory.

A Lancaster University physicist has been given a Royal Society Brian Mercer Feasibility Award to support his work exploring the development of a novel type of computer memory based on the use of quantum dots.

'Conventional silicon-based computer memory will soon reach its limit, so we really need to find a solution with better performance,' said Dr Manus Hayne.

Flash memory, which is commonly used in USB drives, is a non-volatile memory based on charge-storage in an electrically isolated ‘floating gate’ placed between the conductive channel used for readout and the ‘control gate’.

Flash has been the memory technology driver since 2003, taking the leading position from dynamic random-access memory (DRAM), which is the capacitive-based memory used in PCs.

However, Hayne adds, the performance of Flash is rather mediocre. Charging up the floating gate requires pushing charge across the SiO2 barriers that isolate it, making writing very slow and, eventually, damaging it.

Hayne's quantum dot (QD) memory, on the other hand, is a new memory concept that avoids the intrinsic problems associated with pushing charge through an insulating barrier.

It works by storing the charge in a potential well created by surrounding a small volume of a narrow band-gap compound semiconductor (for example, GaSb), with a wide band-gap compound semiconductor (for example, GaAs). In such a device charge capture (write operation) is extremely fast - about 1,000 times faster than for Flash.

Clearly, removing the charge (erase) is still slow, but Hayne said that this can be engineered out in data-storage memory using appropriate architecture, so it is not an issue.

However, this is not good enough for RAM used to execute code in a computer: in that case, read, write and erase operations all need to be fast. Here, a second major advantage of QD memories comes into play.

Rather than being stuck with a choice of Si and SiO2 which always gives the same barrier height, there are a huge variety of compound semiconductors that can be combined in different configurations to allow tuning of the barrier height to give the right balance of erase speed and charge-storage time.

Hence, a very fast device (such as DRAM) that needs to be refreshed, or a non-volatile device (such as Flash) with slow erase can be engineered.

Hayne believes that a QD memory that is 10 times faster than DRAM and uses 10 times less power is possible.

Schematics of memory concepts: (Left) Si/SiO2-based Flash memory. Large SiO2 barriers make writing and erasing the device slow. The control gate and readout channel are not shown. (Right) Quantum dot memory, labelled HSDS (high-speed data storage), is based on III-V compound semiconductors, and has no barrier for writing, making it very fast. Erase is still slow, but this can be engineered out

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