Graphene transistor method could enable fast devices
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A new scalable method for fabricating graphene transistors could deliver on the promise of high-speed carbon electronics.
Developed by researchers at UCLA, the method enables the manufacture of ‘self-aligned’ graphene transistors with a very high frequency.
Graphene, which is a single-layered sheet of carbon atoms, has excellent electrical conductivity and very low resistance owing to its hexagonal lattice arrangement of atoms.
However, a single graphene sheet actually conducts charge so well that it is difficult to make the current stop. This is a crucial stumbling-block if the material is ever going to be used for microelectronic devices such as transistors that act to control the flow of current to perform tasks and computations.
The production of high-performance graphene using conventional fabrication techniques often leads to damage to the graphene lattice’s shape and performance, resulting in problems that include parasitic capacitance and serial resistance.
Now, researchers at UCLA have developed a successful, scalable method for fabricating self-aligned graphene transistors with transferred gate stacks.
By performing the conventional lithography, deposition and etching steps on a sacrificial substrate before integrating with large-area graphene through a physical transferring process, the new approach addresses and overcomes the challenges of conventional fabrication. With a damage-free transfer process and a self-aligned device structure, this method has enabled self-aligned graphene transistors with the highest cutoff frequency to date — greater than 400GHz.
‘Our study defines a unique pathway to large-scale fabrication of high-performance graphene transistors, and holds significant potential for future application of graphene-based devices in ultra–high-frequency circuits,’ the research team commented in the Proceedings of the National Academy of Sciences.
