While driving over to see UK start-up Adiabatic Logic last week, I was listening to some Bruce Springsteen on my battery powered CD player. Unfortunately, after just a few hours, the rather expensive batteries ran out of juice and I was forced to pull into a petrol station to purchase some more. If only the developers of the CD player had had access to the technology that Adiabatic Logic has developed, my stop-over might have been avoided.
For the engineers at Adiabatic Logic, based in Dry Drayton near Cambridge in England, have developed a technology that promises to save up to 75% of the power used in a conventional output pad driver on an Integrated Circuit. And that means portable battery powered devices that can last longer or sport greater functionality.
Adiabatic Logic’s technology has already attracted some very favourable comments from academics. ‘This technique is likely to make a huge saving in power consumption of devices and systems,’ said Professor Andy Hopper, Professor of Communications Engineering at the University of Cambridge in the UK.
Adiabatic Logic’s Intelligent Output Driver (IOD) technology was developed when engineers at the company decided to take a critical look at the power loss in modern ICs and find a way to reduce it.
What they found was that, in a typical portable device, for example, most of the power is consumed by the ICs inside the box. Hardly surprising. But, rather more surprisingly, over 50% of that power is used in the output pad drivers – those small circuits around the periphery of the IC that connect a device up to other devices on a PCB.
Adiabatic Logic’s engineers questioned why this should be so, and, further examination led them into the world of transmission line theory, the fundamental science behind waveform propagation between ICs on a board.
They examined the traditional series termination scheme that is used on most electronic designs today and developed a better scheme that not only uses significantly less power than a conventional output pad driver, but eliminates overshoot and slow rise times to boot.
In modern electronic designs, when a line that connects two devices is driven ‘high’ by one of the two devices, it generates a waveform that propagates along a transmission line (such as a copper track on a PCB) to the other device. Once it reaches the other device, it is reflected back.
To minimise this reflection, a resistor is placed in series with the transmission line so that the output resistance of the driver equals the impedance of the line (<a href=’http://www.e4engineering.com/content_images/fig1adia.gif’>Figure 1</a>). Unfortunately, in this scenario, energy is used to charge the load capacitance at the device that is being driven, later to be discharged again through the resistor.
In effect, the driver can be considered to be a lossy two-pole switch that is driven from a low position (0V, for example,) to a high position (3.3V, for example) and back again.
The Adiabatic Logic approach fundamentally rethinks the two pole idea. Adiabatic Logic’s idea is to use a three-pole switch (<a href=’http://www.e4engineering.com/content_images/fig2adia.gif’>Figure 2</a>) that has a centre position that is connected to an on-chip MOS storage capacitor. The capacitor itself is pre-charged to half the supply voltage and when the switch is moved to its centre position, a half height wave is launched without the need to dissipate power in the resistor, as is the case in the traditional design.
A control circuit adapts the timing of the switch to synchronise it with the return of the reflected wave. Once the wave returns, most of the energy of the wave is stored back in the capacitor, leading to a net saving in power.
At the present time, Adiabatic Logic’s team of engineers have conducted a SPICE simulation of their patented concept to demonstrate its feasibility. The results of the simulation showed that an energy saving of between 50 – 75% could be achieved compared to the power usage of a conventional driver.
The company cites the range of between 50 – 75% because the actual power savings are dependent on specific circuit configurations. In a microprocessor-based system where the microprocessor is driving two banks of memory, one daisy-chained into another, the SPICE simulation demonstrated a power saving of 60%. As an added benefit the new design also suppressed a lot of ringing in the circuit too.
So how easy is it to integrate the new IP into existing designs? ‘Pretty simple’, according to Geoff Harvey, Adiabatic Logic’s Chief Technology Officer, ‘because it is backwards compatible with existing IC designs and foundries.’
The company expects to be sampling a silicon demonstration part later in the year and is presently discussing the licensing of the Intelligent Output Driver Intellectual Property with a number of interested parties. Adiabatic Logic expects to see the IP actually deployed in a commercial product by next year.