In electronics assembly, 60 to 70 percent of final defects occur during the stencil printing process (SPP), a stage of surface-mount technology for printed circuit board assembly.
To address this problem, engineers at the Georgia Institute of technology’s Centre for Board Assembly Research (CBAR) have developed a new data-driven, closed-loop control technology that adjusts equipment parameters in real time, resulting in fewer defects and higher yields.
In SPP, a metallic stencil is placed over the printed circuit board, and a squeegee pushes solder paste through apertures in the stencil onto the board’s surface where components will then be placed for electrical connections. The goal is to deposit the solder onto the pad as accurately as possible because unevenly applied paste can cause various defects.
A number of factors affect the solder deposition, such as variations in air temperature, chemical-physical characteristics of the solder paste and ageing of the stencil, which can cause clogging. The shrinking size of components and a subsequent increase in circuit density present an even bigger challenge.
“That reduces the distance between components’ leads, which makes the deposition of solder paste even more difficult,” says Alex Goldstein, director of operations and infrastructure at CBAR, which is housed in Georgia Tech’s Manufacturing Research Centre.
Up to now, screen-printer operators have gauged product quality by sight. In some cases, automated optical inspection (AOI) technology can be used to assess quality, but human operators still must decide how to adjust machine settings based on the data presented by the AOI.
A major step forward for the electronics industry, CBAR’s technology closes the loop between an AOI system and stencil printer, automatically assessing quality and adjusting machine parameters in real time. (Studies have shown that correcting a print defect at the end of the PCB assembly line typically costs 50 times more than it does to correct the defect at the SPP phase.)
At the heart of this patent-pending technology is a novel algorithm. During operations, sensors measure the height, area and volume of solder paste deposits. Then the control algorithm uses that information to determine whether changes are required, adjusting in real time the speed and pressure of squeegees that apply the solder paste.
“The algorithm catches problems very early that a human operator would never notice,” says Professor Emeritus Edward Kamen of Georgia Tech’s School of Electrical and Computer Engineering.
“One of the novel aspects of this algorithm is that it utilises a small amount of data to generate the change in controls, a whole order of magnitude less than existing control schemes,” Kamen says, noting that large amounts of data would slow production.
In April, Speedline Technologies, a Franklin, Massachusetts-based manufacturer of equipment for the electronics assembly and semiconductor industries, signed an agreement to license the technology from Georgia Tech. CBAR researchers will work with Speedline to continue enhancing the technology.
Beyond stencil printing, this new process-control technology could also be adapted for semiconductor manufacturing, such as wafer bumping and polymer film deposition. CBAR’s process-control approach also has potential for other stages of surface-mount technology, such as component placement.