Flash memory holds twice as much data

US chipmaker AMD has disclosed that it has developed a memory cell architecture that enables a Flash memory product to hold twice as much data as standard Flash.

US chipmaker AMD has disclosed that it has developed a memory cell architecture that enables a Flash memory product to hold twice as much data as standard Flash, without compromising device endurance, performance or reliability.

The first product featuring AMD’s new ‘Mirror Bit’ architecture is scheduled for introduction during the first quarter of 2002. The product is pin-compatible with today’s standard three-volt (low voltage – LV) products, thereby allowing a customer to reap the benefits of the Mirror Bit architecture without changing their system design.

AMD says that the Mirror Bit architecture delivers the low cost structure of a multi-level cell (MLC) solution without any of the drawbacks of MLC. The Mirror Bit architecture’s ability to store two bits of data in one cell, without compromising data integrity, is achieved by dividing each standard cell into two discrete and independent units where the data is stored in physically distinct locations.

Today’s technology announcement is the result of years of research and development on the design, processing, testing and characterisation of multi-bit cells that have culminated in AMD’s patented Mirror Bit architecture. Mirror Bit memory cells, which store a full charge in each of two physically distinct locations, offer many advantages over MLCs that store fractional levels of charge in one location.

Since each bit in the Mirror Bit memory cell is physically in a different location, the bits are independent and do not interact with each other, allowing AMD to offer the same performance and reliability as standard single-bit Flash memory products. The Mirror Bit architecture also overcomes the inherent reliability issues, slow random access and long programming times of MLC technology.

AMD’s planned family of products based on the Mirror Bit architecture will include products from 64-Mbit through 1-Gbit. This product family will include two new performance-enhancing features designed to remove the data input and output bottlenecks inherent to ultra high-density devices.

These products will feature a write buffer that allows faster programming than today’s fastest Flash memory products and a page read buffer that allows page mode access times as fast as 20 ns.

AMD plans to introduce its first Mirror Bit-based, 64-Mb Flash memory products during the first quarter of 2002, with 256-Mb products to follow in the third quarter of 2002.