Cypress Semiconductor, Infineon Technologies and Micron Technology are co-developing specifications for CellularRAM memory.
CellularRAM memory devices, which are low-power Pseudo Static RAMs (PSRAMs) are designed to meet the memory and bandwidth demands of future 2.5G and 3G handset designs.
In addition to offering a lower cost/bit ratio than current solutions, this new type of Pseudo SRAM features SRAM-pin compatibility, external refresh-free operation and a low-power design. CellularRAM memory is a drop-in replacement for asynchronous low-power SRAM used currently in cell phone designs.
The purpose of the co-development effort is to provide customers with pin- and function-compatible products from multiple sources, based on a jointly developed specification for CellularRAM memory. Each company will design and manufacture the products using their own design and process technology.
Based on a one-transistor DRAM cell, CellularRAM memory provides certain advances over a traditional SRAM and a six-transistor (6T) SRAM cell, leveraging the technology and reduced size of a DRAM cell. These products operate at up to 108 MHz clock rates, run at an initial latency of 60 nsec and can achieve up to 216 MByte/sec (1.6 Gbit/sec) of peak bandwidth. CellularRAM memory also features a burst read and write mode that emulates an Intel W18 and Micron Flash Burst compatible protocol with various I/O voltage options.
Infineon and Micron plan to make several CellularRAM devices available in the next 12 months. The first is a 32 Mbit device, organised as 2M x 16 that is scheduled for initial availability in late 2002. A 16 Mbit and 64 Mbit device, organised as 1Mbit x 16 and 4Mbit x 16, respectively will follow shortly.
All the companies are jointly working on the definition of the next generation of the CellularRAM product family, a 128 Mbit device, which is targeted for sampling in the second half of 2003.