Self-adaptive silicon boosts performance of analog and RF designs

Self-Adaptive Silicon, a technology breakthrough from start-up Impinj, promises to eliminate the bottleneck of integrating analog and RF circuitry in a digital CMOS process.

The success of the PC, networking, and communications-product markets has been driven largely by Moore’s Law, which says that IC density doubles every 18 months.

Experts predict that CMOS scaling will continue to follow Moore’s Law for at least another decade, but potential bottlenecks could derail market success if not solved by new design or device technology. One of these bottlenecks is integrating precision analog and wideband RF circuitry in standard digital CMOS.

Applying Moore’s Law to mixed-signal (analog and digital) chips is a significant challenge. Higher transistor density and lower silicon cost allow more complex digital circuitry, but most wireless or wireline communications products require integrating RF, analog, and memory with the digital logic.

Advancements in submicron CMOS processing greatly benefit digital logic and memory, but result in poor analog and RF performance. Transistor matching, noise, resistors, capacitors, and inductors drive the density of analog circuits, and these parameters do not necessarily benefit from transistor scaling.

To compound the problem, digital-circuit design continues to benefit from advances in logic synthesis, accelerating the time-to-market of digital products. Analog circuit design has not historically benefited significantly from CAD-tool advances, and remains a hand-crafted art. Consequently, analog circuits will be a limiting factor for mixed-signal SoC, both in terms of the increasingly larger percentage of the die these circuits occupy, and in terms of their design time.

Impinj’s Self-Adaptive Silicon, however, attacks this ‘analog design bottleneck’ by adding a new dimension to transistor performance. Its ‘Self-Adaptive Silicon’ enables analog circuits to improve with CMOS process scaling, thereby allowing analog designs to follow Moore’s Law.

Self-Adaptive Silicon also reduces analog design time, accelerating the time-to-market of mixed-signal SoC products.

Impinj’s Self-Adaptive Silicon originates by rethinking the physics of floating-gate p-channel MOSFETs (pFET). pFETs are one of the two types of transistors in Complimentary MOS (CMOS) processing; the other is the n-channel MOSFET (nFET). Floating gates are typically associated with FLASH or EEPROM nonvolatile memory (NVM) technology, which adjusts the electronic charge on an nFET floating gate to store one of two digital values. Self-Adaptive Silicon rethinks both the pFET physics and the floating-gate physics, to enable local adaptation in silicon.

Impinj’s technology differs radically from traditional floating-gate technology, in two fundamental ways: first, Impinj fabricates floating-gate devices in standard digital CMOS (with no additional process masks), and secondly, Impinj’s floating-gate MOSFET remains a fully functional transistor during memory updates, allowing precise analog values to be stored on the floating gate.

The end result is a tunable transistor with a nonvolatile (permanent) analog memory, that can be used to design adjustable voltage or current sources, timing delay elements, and a whole host of other analog circuits.

Impinj claim that the result is two huge improvements in analog technology: First, precision analog design using Impinj’s technology is easy, because Impinj’s circuits electrically tune themselves after fabrication, and secondly, Impinj’s circuits can continually adapt over their lifetime, maintaining performance over temperature and supply voltage and device degradations.

The company claims that its advantage lies in its ability to self-tune or calibrate analog CMOS circuits during normal operation. This capability mitigates process, environmental, and other factors that plague standard analog CMOS designs. By using on-chip feedback to slowly and precisely adjust a floating-gate transistor’s charge, analog CMOS circuits can be trimmed to 16-bit accuracy.

Two examples of the benefits of the new technique, namely that of a DAC and an amplifier are provided on the company web site.

Renowned chip design expert Dr. Carver Mead and Dr. Chris Diorio, an associate professor at the University of Washington, founded Impinj in May 2000. The company holds 14 patents on its ‘Self-Adaptive Silicon’ technology for developing high-performance CMOS chips.

Located in Seattle, Washington, Impinj has raised more than $15 million from Arch Venture Partners, Madrona Venture Group and private investors.

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