Jumping Jap flash

NEC has developed a dual-operation flash memory architecture with a page-read function optimised for low-power mobile applications.

NEC has developed a dual-operation flash memory architecture with a page-read function optimised for low-power mobile applications such as cellular phones.

NEC’s two new 64 Mb flash devices (uPD29F064115 and uPD29F064215) run on a minimum power supply of 1.65V (1.8V+/-0.15V) – claimed to be one of the lowest operation voltages available.

The devices sport a high-speed page access time of 30ns. The page-read function itself supports two page modes (4-word random mode and 8-word sequential access mode).

They will be offered as TSOP and FBGA packages, and as stacked multi-chip packages (S-MCPs), which combine flash memory with RAM or SRAM.

Sample shipments are scheduled to begin in October. Volume production will commence in January 2002. A total production of one million units per month is planned. Sample price is $50.

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