1Mbit MRAM memory sports copper interconnects

Motorola unveiled the first 1Mbit magnetoresistive random access memory chip this week at the 2002 Very Large Scale Integration Symposia on Technology and Circuits.

Motorola unveiled the first 1Mbit MRAM (magnetoresistive random access memory) chip this week at the 2002 VLSI (Very Large Scale Integration) Symposia on Technology and Circuits.

Motorola had previously developed the first 256Kbit MRAM chip, which it announced in February 2001. This type of memory is non-volatile, meaning that the information in memory is retained when operating power is turned off.

The MRAM itself is based on a memory cell defined by a single transistor and a single Magnetic Tunnel Junction (MTJ) with read and write cycles of less than 50nsec. This is the largest MRAM demonstration to date and the first to be integrated with CMOS using copper interconnect technology.

The 64K x 16 memory design is based on a 0.6 micron CMOS process and was fabricated on a 200mm substrate using copper interconnects.

A new structure of cladding magnetic material was used on the copper interconnect lines to reduce the power needed to program the bits by a factor of four.

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