A cure for the jitters

Timing noise known as jitter afflicts many conventional integrated circuits. Radical new technology currently being disseminated by project E! 2893 Ajics from Eureka could prove the answer.


Contemporary electronics is about doing more with less and pushing the performance of digital circuits to the limits. Jitter in a circuit invariably becomes a limiting factor when more and more data has to be passed through noisier environments and narrower channels.


It is a problem which can now be addressed by anti jitter circuit (AJC) technology, invented at the University of Surrey’s Department of Electronics. UK company Toric Limited purchased the intellectual property rights to the technology in 2001 and has since setabout developing and licensing it to independent semiconductor designers and the R&D departments of the major international electronics firms.


The technology is based on a new circuit configuration, the AJC, which is capable of reducing jitter on any frequency source. It encompasses circuits for jitter reduction which feature minimum circuit area and low power. It provides a fundamentally different way of addressing jitter from conventional circuits such as the phase locked loop (PLL), which has been around for 40 years.


PLL’s drawbacks are many. The circuits are big, expensive and difficult to deploy and often cannot be completely integrated within a chip, requiring a separate component. It frequently has to be redesigned whenever a chip is refashioned and the simulation tools used by integrated circuit designers do not work reliably for PLL design, providing a risk that the resulting chip will not work properly.


Startlingly different


The AJC circuit is ‘startlingly different’ according to Roger Maran, Toric’s Director of Licensing.


At the core of an AJC, several operations are combined in one simple circuit arrangement. The first operation is to frequency demodulate an input waveform to baseband, creating a series of pulses that are charges of a constant size.


Then an integrator converts the baseband signal to give a phase demodulation signal, which is counterbalanced by a steady current drain of the opposite sense, to produce a sawtooth voltage waveform. The portions of the sawtooth that correspond to the action of the current drain can be represented for successive cycles of this waveform by a succession of lines which are parallel to each other (because the current drain is constant) and equally spaced (because the preceding pulses are charges of a constant size).


Just as Euclid tells us that a straight line that intersects a series of equally spaced parallel lines does so at equal intervals along its length, so a comparator applied to this sawtooth waveform with a fixed reference voltage will be triggered at equal time intervals.


This provides the basis for a new signal that follows the input but at a more constant frequency, i.e. with less jitter. The AJC is a direct (feedforward) way of reducing wider band phase noise or time jitter on any frequency source. In this respect it is believed to be unique.


The familiar PLL, in contrast, is a feedback cancellation circuit, hence inherently different from the AJC and in some respects inferior. The AJC compares the short term frequency variations of the input signal with an internally generated long term average.


Using feedforward, this error signal is then subtracted from the original input signal to correct the short term jitter. The transfer function is therefore the opposite of the PLL, in other words, it corrects the errors above a specified offset frequency (the loop band width).


In comparison to PLLs, AJCs have far greater freedom in selecting the bandwidth of operation.


PLLs rely on a local oscillator, usually a VCO, tuned to the frequency of an input by a process based on the phase difference between the input and the local oscillator.


This feedback system, which consists of a low-pass filter and an amplifier, must be selected to respond slowly enough to changes in the average input frequency in order that low frequency noise is not transferred from the input. This limits the agility of the system.


Furthermore the PLL system does not provide a consistent process of adjustment in the event of a sudden or step change in frequency: instead the system may pass through a discontinuous ‘out-of-lock’ condition in which input and output are not closely related.


Finally, designers of PLLs must compromise between a variety of design trade-offs, and cope with the circuit’s noise behaviours: the overall performance envelope is limited by the combination of such factors.


Unlike PLLs, AJCs contain no oscillator. (To illustrate this fact, functioning AJCs can be designed so that if the input is suddenly turned to DC the output will progressively slow to zero. Nevertheless, the AJC system can be made to oscillate, and will function as a particularly good oscillator if so designed, but this behaviour is not necessary for jitter suppression function.)


The means provided in an AJC to subtract the DC component of the frequency demodulated input pulses provides a self-adjustment for changes in frequency: a change to faster frequency injects more charge into the signal path, which has to be removed by an increase in the subtracting charge flowing through the DC feedback path.


The properties of this loop control a number of important system parameters, such as the cut-off frequency below which it is not wished to suppress phase noise, and the rate at which the system adjusts to a change in input frequency. The system and noise properties of AJCs are different from those of PLLs, with different design trade-offs available.


Simulation of the noise properties of PLLs and AJCs shows that, other things being equal, it should always be possible to design an AJC with lower noise than the equivalent lowest-noise PLL.


Building a prototype


Having bought the rights to AJC, from the University of Surrey’s Department of Electronics, the first step was to test it out. Toric won a Smart DTI/Government micro project grant to build the first prototype. ‘This early support, small though it was, was a vital step for us,’ says John Thirtle, Toric’s Managing Director. ‘It enabled us to build our own confidence and to establish a first toehold of credibility with customers and investors.’


The next step was to introduce the technology to the wider integrated circuit design and microelectronics community where it could be further developed and adapted to meet the varying needs of a wide range of integrated circuit technologies.


Eureka project E! 2893 Ajics provided the ideal medium, and was launched by Toric in October 2002 in partnership with Dutch company Catena Microelectronics BV, a European integrated circuit design house which saw the potential of AJC and wanted to get involved from the beginning.


‘We knew from the outset that it would take substantial resources to transfer and tailor AJC technology to all the circuit platforms capable of benefiting from it and that we would need to work with other organisations,’ says JohnThirtle. ‘Eureka met our needs by providing funding and enabling us to add on new partners one at a time at our own pace. Our activities blossomed with the endorsement of Eureka and Smart, which leveraged us into the real world.’


AJC technology brings a new flexibility to integrated circuit design, particularly in radio frequency applications such as mobile telephony, although it can be used in a range of other applications, as Roger Maran explains.


‘Not only does the circuit suppress jitter and offer significant advantages overconventional circuits, it gives both the circuit designer and the designer of the end product more to play with. AJC offers the product designer a better performing circuit, the benefits of which can be realised in different features for the enduser. In the case of a mobile phone this could be longer battery life, for example, or fewer dropped calls. The result is a better mobile phone, and the manufacturer can exploit this to gain a premium price or amore competitive product.’


As with all truly novel technologies,educating the prospective market on the benefits can take a degree of time and perseverance. But an appreciation of the advantages of AJC is now spreading, with two major international electronics companies currently trying it out unde rlicence and a growing number of others, including independent circuit design houses, assessing how it can be deployed for the benefit of their own customers.


‘Education takes much longer than you’d expect, even for something with the potential of AJC,’ says Maran.’We’ve got huge interest and companies are working right now in transferring the technology to their preferred choice ofapplications. However, the applicability ofAJC is so broad that there is plenty of opportunity for other independent integrated circuit design houses and R&D departments of electronic firms to be first movers in their product areas and enjoy the benefits and competitive advantages of the technology in their applications.’


This article has been reprinted from Global Watch, the monthly magazine of the DTI Global Watch Service. For further information, please click here.



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