World’s fastest PowerPC compiler?

Green Hills Software has developed a new PowerPC compiler that delivers what the company claims is the highest performance ever for compute-intensive applications.

Green Hills Software has developed a new PowerPC compiler that delivers what the company claims is the highest performance ever for compute-intensive applications, according to scores submitted to EEMBC, the Embedded Microprocessor Benchmark Consortium, and certified by EEMBC Certification Labs (ECL).

Green Hills Software’s C/C++/Ada95 optimising compiler, which is already in use, has been selected by Motorola for use in benchmarking their PowerPC ISA-based MPC7455 processor on the EEMBC Telecom test suite.

The EEMBC Telecom benchmark suite is made up of excerpts from telecom application code submitted by developers and collected and validated by EEMBC (www.eembc.org). It measures microprocessor performance on code that is commonly found in demanding telecommunications applications.

The Green Hills compiler achieved an EEMBC Telecom Mark of 28.3 on ‘out-of-the-box’ standard C code and a Telecom Mark of 121.6 on AltiVec-optimized ‘full-fury’ code on a 1.0-GHz MPC7455 processor. On the popular Dhrystone benchmark, Green Hills Software’s compiler achieved 2583 VAX MIPS on a 1.0-GHz MPC7455.

‘The Green Hills Software compiler generated the fastest code on the EEMBC Telecommunications suite of benchmarks in our previous certification of the 1GHz MPC7455 processor,’ said Chuck Corley, director of applications engineering for Motorola’s Computing Platform Division. ‘We were pleased to see that the Green Hills compiler provided superior performance on our new AltiVec-enabled, optimised version of this suite as well.’

The new Green Hills compiler accepts C, C++, EC++, and Ada95 source code, and generates optimised object code for over 20 models of PowerPC ISA-based processors, including Motorola’s 603e, 850/860, 8240/8245, 8250/8260, the newly announced 8540 and 8560, 740/745, 750/755, 7400/7410, 7440/7445, 7450/7455, and IBM’s 403, 450 and 455.

Optimisations are both global and target specific. Target-specific optimisations take the individual architecture’s instruction set, pipeline characteristics, register file, addressing modes, and cache characteristics into account to produce code that is tuned for the user’s application.