Working with an international group of researchers, Prof Gehan Amaratunga from Cambridge University has produced a novel memory device that is set to rival transistor-switched silicon-based memory.
The most common type of memory in use today is volatile random-access memory (volatile RAM), which requires a power source to store data. Volatile RAM may be divided into two types: dynamic and static (DRAM and SRAM). In DRAM each memory cell can consist simply of one capacitor and one transistor. The capacitor holds the bit of information, the transistor acts as a switch, letting the control circuitry on the chip read the capacitor or change its state.
Reading the state of the capacitor destroys the information in it and so the read operation must be followed by a write operation in which the state of the capacitor is restored. The capacitor consists of two charged layers separated by an insulator. The capacitor leaks charge and the information eventually fades unless the capacitor charge is refreshed.
The second type of volatile RAM, SRAM does not need to be periodically refreshed and so has significantly faster access times than DRAM. It also requires less power in operation. However, six transistors are required to form a single SRAM cell. Although inferior to SRAM, DRAM is used because the small number of components required means that a cell can occupy less area on a silicon chip.
Another factor affecting the area a cell requires is the size of the components themselves. Decreasing component sizes and increasing silicon wafer sizes are the major factors in driving down the cost of silicon devices. However, it is becoming increasingly difficult to achieve reduced feature sizes in the manufacturing process.
Researchers have been trying to create electromechanically driven switches small enough to rival transistor-switched silicon-based memory. Unlike transistors, electromechanically driven switches contain moving parts. Not only do electromechanical devices have fast switching characteristics, but the physical separation between the switch and the capacitor in such devices means the data-leakage problem is significantly reduced.
However, until now, the technology has not been a viable alternative to silicon-based arrangements because it involved larger cells and more complex fabrication processes.
Prof Amaratunga and his team have remedied these drawbacks by creating a novel nanoelectromechanical (NEM) switched capacitor, based on vertically aligned multiwalled carbon nanotubes (CNTs).
Rather than creating memory chips through a photolithographic process, nanotubes are grown in place on a silicon wafer by allowing a carbon-carrying gas to absorb onto a hot nickel surface, which acts as a catalyst for the nanotube growth.
The length of time for which the nanotube is grown determines its length, which in turn determines its mechanical properties such as stiffness and resonant frequency. The resonant frequency of the nanotube structure determines the maximum switching speed of the NEM switch and its stiffness determines how much charge is needed to deflect it into contact with the other element of the cell.
One nanotube that stores an electric charge bends toward a static nanotube. When the two touch, an electrical contact is created and charge can flow to a capacitor structure formed around the static nanotube.
This charge is used to represent a bit of information; a charged capacitor represents an ‘on’ state and an uncharged capacitor represents an ‘off’ state.
The vertical nature of the NEM capacitor structure allows for high integration densities, reducing both process costs and size requirements. There is a sharp transition between the ‘on’ and the ‘off’ state of the switch, which means that a very small difference in voltage can change the state of the device, reducing the amount of power required for its operation.
Nanoelectromechanical devices based on carbon nanotubes have been reported previously, but this is the first time researchers have been able to control the number and spatial location of nanotubes over large areas with the precision needed for the production of integrated circuits.
When positive bias voltages are applied to the drain (D) and gate (G), electrostatic forces act to deflect the nanotube on the drain to make contact with the top metal of the capacitor on the source (S), causing it to become charged. On removal of the gate bias voltage, if the combined electrostatic and van der Waals forces acting on the drain nanotube are weaker than the elastostatic force pulling it to the vertical, it will spring back to its original position, leaving the nanoscale capacitor on the source in a charged state