Purdue University engineers have designed a new circuit demonstrated to reduce the amount of power needed to run a computer’s memory. The technology is aimed at saving energy, enabling portable devices to run longer on a single charge and to use lighter-weight batteries.
Power conservation is said to be critical for laptop computers, medical devices that are worn on or implanted in the body, and a plethora of emerging wireless devices that run on batteries.
The low-power issue is also becoming increasingly important for ultra-powerful ‘parallel processors’ used for everything from weather forecasting to animation as these computers require so much power that they place an enormous load on a building’s electrical system.
The new circuit is designed to continually monitor how much memory is needed – depending on the programs that are running at any given time – and then strategically shut down unneeded memory circuits automatically.
The design also reduces the amount of electricity that is normally ‘leaked’ from memory circuits in a computer’s microprocessor chip.
Computer simulations have shown that the design would reduce the amount of energy consumed by a computer’s cache memory by 62 percent, while degrading overall performance by only 4 percent.
Cache temporarily stores only the information being accessed most often by a computer user, making for much faster retrieval of that information than would be possible if it were stored along with all the other memory.
However, there is a trade off for the high performance provided by cache memory: it consumes a large amount of energy.
Presently, computers run constantly on full power regardless of whether the programs being used are using a small portion of the system’s total memory.
‘But sometimes we will need only 10 percent of the memory that is on the chip. As the application is running, we are going to figure out how much memory it needs and cut down the power for the rest of the unused portion,’ said T.N. Vijaykumar, an assistant professor of electrical and computer engineering at Purdue.
The smart circuit re-evaluates how much memory is needed every thousandth of a second by counting the number of times cache memory is unable to find information requested during that time.
If the cache memory is too often unable to retrieve requested information, and then more memory is automatically made available. Conversely, if performance is higher than the level required, memory is reduced.