Pack that in

Intel researchers announced today that they have developed a new semiconductor packaging technology.

Intel today announced that its researchers have developed a new semiconductor packaging technology that will help the company build processors with more than 1 billion transistors.

Today, silicon chips, such as the Intel Pentium 4 processor, are connected to their packaging via tiny balls of solder called ‘bumps.’ These bumps make the electrical and mechanical connections between the package and the chip. As the frequency in future processors increases exponentially, the performance of the bumps, the thickness of the packaging and the number of connection points become a concern.

Intel’s ‘Bumpless Build-Up Layer’ or BBUL packaging, however, eliminates use of these solder bumps completely. Instead of attaching the silicon die to the package, the BBUL technique grows the package around the silicon, resulting in thinner, higher-performance processors that consume less power.

High-speed copper connections are used to connect the die to the different layers of the package. This approach reduces the thickness of the processor package and enables the processor to run at a lower voltage – both key features for small, battery-operated devices such as mobile PCs or handheld devices.

Using BBUL packaging, Intel could also create multi-chip processors, such as server processors with two silicon cores and other supporting silicon chips embedded into one small, high-performance package.

BBUL packaging technology could also offer a simple method to develop a ‘system-on-a-package’ through the use of high-speed copper lines directly located above the different pieces of silicon. This would allow designers to more easily embed powerful computers into such everyday objects as a car’s dashboard.

Intel Labs researchers will disclose the technical details of its new packaging technology on October 9 at the Advanced Metalization Conference in Montreal.

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