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Analog Devices (ADI) has introduced 18 power-efficient analogue-to-digital converters (ADC) with resolutions ranging from 10 to 16 bits.

Designed for power-sensitive communications, industrial, portable electronics and instrumentation equipment, ADI claims that these ADCs reduce power consumption by as much as 60 per cent compared to competing ADCs.

The flagship converter in this series, the AD9268, is a 125MSPS (mega samples per second) 16-bit, dual-channel ADC and consumes 376mW per channel.

These ADCs allow system engineers to increase channel counts without increasing a product’s board area or power consumption, enabling higher call volume in cellular base stations, for example, or improved image resolution in medical magnetic-resonance imaging (MRI) equipment.

In hand-held and other power-sensitive applications, ADI’s low-power ADCs enable improved system performance while extending battery life in hand-held devices, such as portable spectrum analysers.

The AD9268 dual-channel, 16-bit ADC is available in speed grades of 80, 105 and 125MSPS.

The 125MSPS option achieves 78dB SNR (signal-to-noise ratio) and 90dB SFDR (spurious-free dynamic range) to 70MHz analogue input frequency, while consuming 376mW per channel.

Available in a Pb-free, 9mm x 9mm chip-scale package, the AD9268 is pin-compatible with ADI’s other low-power ADCs.

Another converter in the series, the AD9251, is a dual-channel, 14-bit ADC and is available in the same 64-lead LFCSP pin-compatible footprint, and is offered in speed grades of 20, 40, 65 and 80MSPS.

With 73.5dB SNR and 85dB SFDR to 70MHz analogue input frequency, the AD9251 dissipates only 86mW per channel at 80MSPS.

All of ADI’s dual ADCs operate from a single 1.8V analogue power supply and feature a high-performance sample-and-hold circuit and on-chip voltage reference.

The AD9251 range offers a separate driver supply to accommodate 1.8V or 3.3V CMOS logic outputs, while the AD9268 range offers 1.8V LVDS or CMOS outputs.

The ADC cores use a multi-stage, differential pipelined architecture with integrated output error-correction logic.

The ADCs also contain features such as programmable clock and data alignment and programmable digital test-pattern generation.

The available digital test patterns include built-in, deterministic and pseudo-random patterns, as well as definable test patterns that users can enter via the serial port interface (SPI).

These low-power ADCs are also compatible with ADI’s dual-channel VGAs (variable gain amplifiers), including the AD8372 programmable dual VGA and AD8376 IF dual VGA, as well as the ADL5561 differential RF/IF amplifier and ADL5562 differential RF/IF amplifier.

Recommended clock generators include the AD9520-0 and AD9522-0.

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