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Cadence Design Systems has announced the availability of the Virtuoso Accelerated Parallel Simulator (APS), its next-generation circuit simulator.

The simulator was developed to solve the largest and most complex analogue and mixed-signal designs across all process nodes.

A key part of the Cadence multi-mode simulation (MMSIM) 7.1 release is a combination of Cadence simulation technologies and a parallel circuit solver.

It also features an engine that efficiently harnesses the power of multiprocessing computing platforms.

The result is a circuit simulator with an accuracy and use identical to the Virtuoso Spectre circuit simulator, delivering improved single-thread performance and scalable multi-thread performance.

The Virtuoso APS offers improved convergence and capacity for designs with hundreds of thousands of transistors, reducing design and verification time in most cases from weeks to hours.

It addresses performance and capacity challenges that occur when designing and verifying large tightly coupled and post layout analogue and mixed-signal blocks and subsystems.

The company said the simulator delivers exceptional performance and is significantly faster than the traditional Spice circuit simulators for pre- and post-layout analogue blocks and mixed-signal designs.

This improves IC design productivity by completing most simulation tasks within the same working day and enables verification tasks that would otherwise be impractical.

The Virtuoso APS has been extensively tested with hundreds of customer designs and validated by more than 20 industry-leading customers on performance, capacity, and accuracy against the industry-standard Virtuoso Spectre circuit simulator.

The Virtuoso APS is compatible with existing Cadence simulation technologies, enabling customers to preserve investments made with Virtuoso custom IC platform without adoption barriers.

Cadence Design Systems

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