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Carbon Design Systems has announced the availability of its Carbon Model Library for co-simulation that includes advanced ARM processors.

It gives register transfer level (RTL) and firmware engineers a way to simultaneously debug processor integration into complex system-on-chip (SoC) designs, reduces the overall schedule and establishes a foundation for further productivity gains using virtual platforms.

Carbon’s co-simulation approach allows for the hardware design to be run through any of the leading RTL simulators while the firmware is interactively debugged using software tools such as ARM’s Realview debugger.

Tom Rathje, Carbon’s vice president of engineering, said: ‘this new co-simulation library delivers the benefits of virtual platforms to the RTL designer by leveraging the existing RTL infrastructure and avoiding the task of assembling a virtual platform.

‘The designer simply replaces the instantiation of the processor in their simulation environment with the corresponding component from the Carbon Model Library.’ He added: ‘the model will have the same functionality but can now be debugged interactively using a software debugger instead of waveforms.’ Each component in the library has been compiled directly from the corresponding RTL code and retains 100 per cent of the accuracy of the hardware design.

All models are integrated with a corresponding software debugger that enables the firmware designer to set breakpoints and observe and/or modify register and memory locations.

Co-simulation of the models with RTL code is supported in all leading simulators, including Synopsys VCS, Cadence Incisive Enterprise Simulator and Modelsim from Mentor Graphics.

ARM models currently available in the model library include the Cortex A9UP, Cortex A9MP, Cortex A8, Cortex M3, Cortex R4, 1176, 1136, 11MPCore and 926.

Carbon Design Systems

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