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CSEM researchers have devised a generic ultra-low power thermal compensation concept, which it plans to present at February’s International Solid State Circuits Conference in San Francisco.

Silicon resonators offer significant advantages compared to quartz crystals for timing applications.

Thinner and smaller than their quartz counterparts, they are also more robust, and offer better aging performance, as well as programmability.

Furthermore, they can benefit from the economies of scale of CMOS wafer processing to achieve lower cost, as well as the possibility of integration into a single monolithic structure with no external components.

Silicon resonators, however, suffer from a strong temperature dependence; various methods are used to overcome this, however these methods tend to increase the complexity of the device or the system power consumption when relying on electronic temperature dependant fractional PLLs.

CSEM’s concept, when applied to a low-frequency piezoelectric AlN-driven silicon resonator, can be used to implement a real-time clock (RTC) and a reference for a MEMS-based frequency synthesiser architecture, eliminating the need for any other bulky reference.

This RTC achieves +/- 5ppm frequency accuracy over 0-50C at 3uA, hence three orders of magnitude reduction compared to commercially available silicon resonator products.

One application that stands to benefit from this breakthrough is wireless sensors, and this opens the way to true ultra-low power single-chip sensor nodes with no external components.

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