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Plurality has launched a scalable 256 multi-core processor for wireless infrastructure: the Hypercore family of low-power, small footprint, Manycore processor IP for wireless markets.

Hypercore is said to represent a new category of acceleration co-processor based on an architecture that simplifies code compilation and a hardware-based synchroniser-scheduler, which delivers performance that scales linearly with the number of cores.

In addition, its efficiency offers power consumption that rivals hard-wired ASICs.

Plurality offers its Hypercore acceleration processor IP to system-on-chip (SoC) developers and OEMs as a general purposes accelerator for wireless, networking and high-performance (Cloud) computing applications.

The Hypercore processor IP acts as a performance extension to popular processor architectures (x86, PowerPC, MIPS and ARM), enabling improved SoC performance without greater power consumption or die area.

The combination of optimised high-performance multi-cores is said to provide designers with the ability to make the best possible trade-offs between size, power and programmability to meet the challenging needs of next-generation multiband, multimode radios.

The solution is reconfigurable and provides a platform for applications ranging from 4G macro base-stations to cost-optimised femtocells, therefore offering the benefits of single scalable hardware platform design and extensive software code re-use.

With a Hypercore-based design, a base-station OEM can achieve a unified platform strategy both vertically across wireless standards such as LTE, HSPA, or 3G, as well as horizontally across wireless devices ranging from macro base-stations to femtocells.

In addition, Plurality’s development environment and task-oriented programming model, together with a growing ecosystem of system and software partners, enables rapid product development.


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