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Linear Technology has introduced the LTC2261, a low-power 14-bit, 125Msps ADC that dissipates only 127mW, less than one-third the power of prior solutions.

Whether operating at full speed or in sleep mode for reduced power-dissipation down to 0.5mW, the LTC2261 significantly lowers the power budget for high-speed data acquisition, helping products to be used portably.

Operating from a low 1.8V analogue supply, the LTC2261 achieves significant power savings without sacrificing AC performance.

This ADC offers signal to noise ratio (SNR) performance of 73.4dB and spurious free dynamic range (SFDR) of 85dB at baseband.

Ultralow jitter of 0.17psRMS allows undersampling of IF frequencies, with excellent noise performance.

The combination of low power and good AC performance saves power for battery-powered portable instrumentation and multichannel systems such as medical ultrasound and non-destructive test equipment.

JTRS-software defined radios and other portable communication equipment also benefits from the low-power portability of this breakthrough ADC family.

The LTC2261 eases the task of designing with high speed ADCs.

In such designs, care is needed when routing digital outputs to avoid digital noise coupling back and distorting the analogue reading.

Interference from digital feedback is visible as unwanted tones in the ADC output spectrum.

To help negate this effect, the LTC2261 offers a data randomiser to randomise the digital output before it is transmitted, to achieve a significant reduction in unwanted tone amplitude by spreading this energy into the noise floor.

Using this data encoding scheme can reduce the residual tones caused by digital feedback by 10-15dB.

The LTC2261’s innovative digital outputs can be set to full rate CMOS, double data rate CMOS or double data rate LVDS.

Double data-rate digital outputs allow data to be transmitted on both the rising edge and the falling edge of the clock, reducing the number of data lines needed by half.

A separate output power-supply allows the CMOS output swing to range from 1.2 to 1.8V.

The LTC2261 is available in a 6 x 6mm QFN package.

It includes a clock duty-cycle stabiliser circuit to facilitate non 50-per-cent clock duty cycles, programmable digital output timing, programmable LVDS output current and optional LVDS output termination.

These features combine to make the data transmission between the ADC and the microcontroller more flexible.

The LTC2261 family comprises six pin-compatible members, offering 14-bit resolution at 125Msps, 105Msps and 80Msps; and 12-bit resolution at 125Msps, 105Msps and 80Msps.

A lower-speed pin-compatible family with 14-bit and 12-bit versions at 65Msps, 40Msps and 25Msps is also available.

Each device is offered in commercial and industrial temperature grades.

Linear Technology now part of Analog Devices

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