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Rambus has announced its Mobile Memory Initiative, a development that focuses on high-bandwidth, low-power memory technologies targeted at achieving data rates of 4.3Gbps.

With this performance, designers could realise more than 17Gbps of memory bandwidth from a single mobile DRAM device.

These technologies enable a memory architecture ideal for next-generation smartphones, netbooks, portable gaming, and portable media products.

Rambus will demonstrate a silicon test vehicle for its Mobile Memory Initiative at DesignCon 2009.

Rambus has combined its high-bandwidth expertise with power-efficient signalling technology to create key innovations for its Mobile Memory Initiative, such as very low-swing differential signalling, which combines the robust signalling qualities of a differential architecture with circuit techniques to reduce active power consumption.

Its Flexclocking architecture – a clock-forwarded and clock-distributed topology – enables high-speed operation and a simplified DRAM interface; and Advanced Power State Management – in conjunction with the Flexclocking architecture – provides fast switching times between power-saving modes and delivers optimised power efficiency across a range of usage profiles.

Rambus’ Mobile Memory Initiative also incorporates key innovations such as Flexphase and Microthreading technology.

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