Three major labs enter research agreement

Oak Ridge National Laboratory, Motorola Labs and Pacific Northwest National Laboratory have entered into a research agreement to pursue new materials for semiconductors.

Scientists at Oak Ridge National Laboratory (ORNL), Motorola Labs, and Pacific Northwest National Laboratory (PNNL) have entered a co-operative research and development agreement (CRADA) aimed at increasing the speed of future generations of integrated circuits.

The scientists will pursue new materials that they believe may overcome a fundamental problem in physics that threatens to limit future semiconductor improvements, and for which the semiconductor industry currently has no solution.

For decades, the semiconductor industry has been able to continue increasing the amount of circuitry on a chip while reducing its size. However, researchers have long known that the industry will eventually hit a wall that will prevent semiconductor designers from achieving additional size reduction.

The problem is said to rest with the current gate insulating material, a layer of silicon dioxide approximately 35 angstroms thick, or the thickness of 25 individual silicon atoms.

The silicon dioxide layer ‘gates’ the electrons, controlling the flow of electricity across the transistor. Each time the chip is reduced in size, the silicon dioxide layer must also be thinned proportionally.

At the current pace of chip progression, industry experts expect the gate thickness will need to be reduced to fewer than 10 angstroms. Once the thickness is reduced to 20 angstroms or less, the silicon dioxide is no longer able to provide effective insulation from the effects of quantum tunnelling currents (the natural tendency of electrons to flow across thin barriers or thin insulators) and devices will fail to work properly.

To develop an effective gate insulator at a dimension of fewer than 20 angstroms, most industry experts predict the need to develop new materials with a higher dielectric constants, or high-k materials, that have a higher capacitance for a given thickness. Independent of each other, ORNL and Motorola Labs have been developing just such materials in the form of crystalline oxides on silicon and other semiconductor materials.

Motorola Labs also has been researching high-k materials for several years and, in 1999, demonstrated the world’s thinnest functional transistor by growing a strontium titanate crystalline material on a silicon substrate.

This high-k material demonstrated electrical properties more than 10 times better than equivalent silicon dioxide.

While both labs have made significant progress independently, the scientists hope that combining their expertise will enable them to solve more quickly the remaining issues for the benefit of the entire US semiconductor industry.