3D chips

IBM today announced a chip-stacking technology that paves the way for engineers to build three-dimensional chips. The technology called "through-silicon vias" - allows different chip components to be packaged much closer together for faster, smaller, and lower-power systems.

The IBM breakthrough enables the move from horizontal 2-D chip layouts to 3-D chip stacking, which takes chips and memory devices that traditionally sit side by side on a silicon wafer and stacks them together on top of one another. The result is a compact sandwich of components that dramatically reduces the size of the overall chip package and boosts the speed at which data flows among the functions on the chip.

The new IBM method eliminates the need for long-metal wires that connect today's 2-D chips together, instead relying on through-silicon vias, which are essentially vertical connections etched through the silicon wafer and filled with metal. These vias allow multiple chips to be stacked together, allowing greater amounts of information to be passed between the chips.