Nanoparticle 'sandwich' enhances device performance

The discovery was made by a team led by Prof Paddy Chan and Prof Dennis Leung of the Hong Kong Polytechnic University.

Because certain metal nanoparticles trap electric charges very effectively, they are becoming a popular additive for enhancing transistor performance and producing thinner transistors.

Sandwiching a layer of nanoparticles is said to be more compatible with the low-cost, continuous roll-to-roll fabrication techniques used to make organic electronics than the more intricate patterning required to put material just in the transistor gate area.

Chan’s group showed that the thickness of the nanoparticle layer changes the device performance in predictable ways that can be used to optimise transistor performance to meet application requirements.

Transistors made with a 1nm nanoparticle layer, for example, have stable memory that lasts only about three hours, which would be suitable for memory buffers. Transistors having a 5nm-thick layer are more conventional and retain their charge for a much longer time.