XJTAG, a supplier of boundary scan development tools, has added a JTAG chain debugger to its XJTAG Development System. XJTAG claims JTAG will reduce debug and test times for engineers designing and testing complex printed circuit boards.
The JTAG chain debugger features a range of debug options which allow designers to trace signals around the board and immediately find the location of any problems within the JTAG chain. This capability means that engineers can get boards up and running quickly, rapidly diagnose faults and speed up the whole development process.
In addition to the new chain debugger, the XJTAG Development System has been enhanced with a host of other new features to speed up board design and prototype testing. For example, the connection test now includes built-in testing of pull-up and pull-down resistors, along with more precise fault detection. Within XJAnalyser, BSDL file auto-detection has been improved and the library of reusable JTAG scripts has been greatly expanded. It is also said to be much quicker now to set up non-JTAG devices following enhancements to the Devscript utility for XJEase.
The XJTAG boundary scan Development System meets the growing market need for a cost-effective solution for testing tightly-packed printed circuit boards populated with ball grid array (BGA) and chip scale devices, which cannot be tested by traditional methods.
The XJTAG system is designed to cut the cost and shorten the development cycle of electronic products and provides a solution that can test JTAG as well as non-JTAG devices.
XJTAG can test a high proportion of a circuit including BGA and chip scale devices, SDRAMs, Ethernet controllers, video interfaces, Flash memories, FPGAs (Field Programmable Gate Arrays), microprocessors and many other devices. XJTAG also enables In-System Programming of FPGAs, CPLDs (Complex Programmable Logic Devices) and Flash memories.
“Many board designers and developers are still unaware of the capability of boundary scan systems and the fact that they provide a cost-effective solution particularly for smaller, more tightly packed circuit boards with less test points and an increasing proportion of JTAG-compliant chips,” said Simon Payne, XJTAG’s CEO.
The XJTAG Development System incorporates XJAnalyser, XJEase, XJRunner, XJLink and XJDemo. XJAnalyser is a powerful tool for circuit visualisation that provides a simple graphical view of the state of all JTAG pins. XJEase is the high-level, BASIC-like test description language for manipulating non-JTAG devices. XJRunner is a production optimised version of the XJTAG Development System, designed specifically for contract manufacturers and production sites. XJLink is a USB 2.0 hardware module used to connect the computer with the unit under test. XJDemo is a fully populated demonstrator board, with tutorials designed to provide the developer with a rapid understanding of the XJTAG system and how to simulate faults.