As nanoscale circuits continue to shrink, electrical resistance increases in the wiring and limits the maximum circuit speed. A new simulation program developed by researchers at the US National Institute of Standards and Technology (NIST) and George Washington University (GWU) can be used to predict such increases with greater input flexibility and model accuracy than other methods.
The software program is expected to help the semiconductor industry design and test devices more efficiently and with greater cost-effectiveness.
On average, an electron can travel only 39 nanometres in pure, bulk copper at room temperature before it is scattered by thermal vibrations of the copper atoms.
But, as the dimensions of the wiring shrink, additional scattering by surfaces and grain boundaries within the metal lead to undesirable increases in resistance.
The NIST/GWU computer program enables users to examine how these additional mechanisms alter the resistance of the thin, narrow metal lines that make up the circuit wiring.
NIST researchers used the simulation program to demonstrate that, at critical nanoscale dimensions, electron scattering from surfaces and grain boundaries have effects that are interdependent. This interdependence could not be predicted using methods previously available. The finding has implications for both achievable circuit speed and electrical measurements of the dimensions of thin, narrow lines.