US team claims ADC chip is world’s most efficient

ADC (analogue-to-digital converter) microchips change analogue inputs into digital signals are in virtually all types of electronic device we use today. Smartphone manufacturers like Apple and Samsung are constantly searching for improved ADC chips that can deliver high performance, but as efficiently as possible so that battery life can be maintained.

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The new BYU-developed ADC chip consumes just 21 milli-Watts of power at 10GHz for ultra-wideband wireless communications. According to the university’s Professor Wood Chiang, existing ADCs consume hundreds of milli-Watts or even Watts of power at comparable speeds.

"Many research groups worldwide focus on ADCs; it's like a competition of who can build the world's fastest and most fuel-efficient car," said Chiang, a professor a BYU’s Department of Electrical and Computer Engineering. "It is very difficult to beat everyone else around the world, but we managed to do just that."

The team achieved these efficiency gains by focusing on the DAC (digital-to-analogue converter) component of the chip. They were able to increase performance by reducing the loading from the DAC through scaling both the capacitor parallel plate area and spacing. They also grouped unit capacitors in a different way from usual, placing together unit capacitors that are part of the same bit in the DAC rather than having them interspersed throughout. According to the researchers, this lowered the bottom-plate parasitic capacitance by a factor of three, significantly lowering power consumption while at the same time increasing speed.