Beat the heat

A new technique for fabricating liquid cooling channels onto the backs of high-performance integrated circuits could allow denser packaging of chips while providing better temperature control and improved reliability.

Developed at the Georgia Institute of Technology, the wafer-level fabrication technique includes polymer pipes that will allow electronic and cooling interconnections to be made simultaneously using automated manufacturing processes. The low-temperature technique, which is compatible with conventional microelectronics manufacturing processing, allows fabrication of the microfluidic cooling channels without damage to integrated circuits.

The on-chip microfluidic technique was described June 7th at the eighth annual IEEE International Interconnect Conference in San Francisco. The research was sponsored by the Microelectronics Advanced Research Corporation (MARCO) and the Defense Advanced Research Projects Agency (DARPA).

"This scheme offers a simple and compact solution to transfer cooling liquid directly into a gigascale integrated (GSI) chip, and is fully compatible with conventional flip-chip packaging," said Bing Dang, a Graduate Research Assistant in Georgia Tech's School of Electrical and Computer Engineering. "By integrating the cooling microchannels directly into the chip, we can eliminate a lot of the thermal interface issues that are of great concern."