Researchers etch integrated circuits onto graphene

The demonstration is claimed to offer possibilities for energy-efficient, flexible, and transparent electronics.

According to the university, bulk materials commonly used to make CMOS transistors and interconnects pose fundamental challenges in continuous shrinking of their feature-sizes and suffer from increasing ‘contact resistance’ between them, both of which lead to degrading performance and rising energy consumption.

Graphene-based transistors and interconnects are a promising nanoscale technology that could potentially address issues of traditional silicon-based transistors and metal interconnects.

‘In addition to its atomically thin and pristine surfaces, graphene has a tuneable band gap, which can be adjusted by lithographic sketching of patterns - narrow graphene ribbons can be made semiconducting while wider ribbons are metallic. Hence, contiguous graphene ribbons can be envisioned from the same starting material to design both active and passive devices in a seamless fashion and lower interface/contact resistances,’ said Kaustav Banerjee, professor of electrical and computer engineering and director of the Nanoelectronics Research Lab at UCSB.